1. Field
The present invention relates to methods for fabricating semiconductor devices. In particular, it relates to a method for fabricating a semiconductor device, including a step of planarizing a surface by chemical mechanical polishing.
2. Description of Related Art
Recently, in manufacturing a semiconductor integrated circuit device having a multilayer structure, the focal depth for exposure in a photolithographic step is decreasing as exposure patterns become finer. In order to form an image of a transfer pattern on the entire surface of a substrate, the flatness of the substrate surface needs to be increased. A chemical mechanical polishing (CMP) process is introduced to increase the flatness of the substrate surface.
Japanese Laid-open Patent Application Publication No. 2004-128112 describes a CMP apparatus for planarizing a substrate surface. A typical CMP apparatus is equipped with a plurality of polish tables. A polisher pad formed of, for example, polyurethane foam is attached to each polish table. A semiconductor substrate is polished while being held by a polish head and pressed against a polisher pad. Each polish table is equipped with a dresser for conditioning the polisher pad. A new polisher pad placed on a polish table is subjected to conditioning before actual polishing. Conditioning is also conducted after completion of polishing of one wafer before polishing of a next wafer. Conditioning may be conducted during polishing.
In a typical planarization step by CMP, a surface in which patterned metal films and insulating films are exposed is polished to conduct planarization. In order not to generate differences in level between the metal film surfaces and the insulating film surfaces, the ratio of the polish rate of the metal films to the polish rate of the insulating films needs to be controlled to an appropriate value.
In the case where metal wiring is formed by a damascene process, overpolishing is sometimes conducted to prevent the metal films from remaining on the insulating films. As a result of overpolishing, surface layer portions of the metal films filling recesses are excessively polished, thereby rendering the upper surfaces of the metal films to be lower than the upper surfaces of the insulating films and generating dents. These dents that occur in the metal film surfaces are called “dishing”.
In planarizing the surface after dishing is formed therein, the ratio of the metal film polish rate to the insulating film polish rate needs to be controlled at an appropriate level in accordance with the depth of the dishing.